Wideband high-speed DAC-based frequency synthesizer
نویسندگان
چکیده
Abstract Wideband hybrid frequency synthesizer with phase-locked loop (PLL) and high-speed direct-to-analog converter (DAC) is presented. The use of special DAC operating modes allows to expand the generating band. Presented also provides a low phase noise due using RF mixer in PLL feedback.
منابع مشابه
A wideband digital frequency synthesizer
I I I I / With the rapid advance in CMOS technology. the trend.of the VLSI then towards system-on-chip (SOC) where design methodology. cost. and turnaround time are major issues. Concepts of intellectual property (IP) are then proposed to fit for SOC designs. Based on a DFS controller IP [4]. a wideband digital frequency synthesizer (DFS) is proposed to fit in with the wireless LAN applications...
متن کاملA 2.9mW ADPLL-BASED FREQUENCY SYNTHESIZER FOR HIGH SPEED CLOCK GENERATION
The cores of the ADPLL-based frequency synthesizer are digital controlled oscillator (DCO) and phase frequency detector (PFD). A modified digitally controlled delay element (DCDE) with characteristics of its monotonicity and insensitivity to PVT variations is presented for the DCO design. We also proposed a new PFD architecture that can finish phase and frequency comparison and adjustment in on...
متن کامل12-bit High Speed Direct Digital Frequency Synthesizer Based on Pipelining Phase Accumulator Design
This paper presents high speed direct digital frequency synthesizer (DDFS) based on pipelining phase accumulator (PA). The proposed 12-bit PA contains three pipelining stages with 4-bit carry-lookahead adder (CLA) with the carries ripple between these stages. Comparing results between similar phase accumulator designed with ripple carry adder on, Cyclone III FPGA platform reveals that the propo...
متن کاملA 1.35 GHz CMOS wideband frequency synthesizer for mobile communications
The design and simulation of a 1.35 GHz fully integrated CMOS frequency synthesizer for a double band receiver is presented. The proposed synthesizer is based in a wide-band PLL topology with a high reference frequency. This approach allows obtaining low phase noise, fast switching time, a low divider ratio and a reduction in the total chip area. Besides, the use of a novel charge-pump circuit ...
متن کاملDwa Technique to Improve Dac of Sigma-delta Fractional-n Frequency Synthesizer for Wimax
A first order of DWA (Data Weighted Averaging) algorithm with third order sigma-delta modulator is proposed for application in sigma-delta fractional-N frequency synthesizer for WiMAX. In addition, this paper discusses the impact of mismatch between Digital-to-Analog convertor (DAC) unit elements. The simulation results show the effectiveness of the DWA technique in reduction of spurs, also DWA...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Journal of physics
سال: 2022
ISSN: ['0022-3700', '1747-3721', '0368-3508', '1747-3713']
DOI: https://doi.org/10.1088/1742-6596/2388/1/012114