VLSI Process Simulation

Process Variability Modeling for VLSI Circuit Simulation

This paper presents a systematic methodology to develop statistical compact MOS models for advanced VLSI circuit simulation. Process variability in advanced CMOS technologies imposes a serious challenge for computer-aided VLSI circuit design. Therefore, statistical compact model has become indispensable for realistic assessment of the impact of random process variability on advanced VLSI circui...

VLSI Fabrication Process

VLSI stands for "Very Large Scale Integration". This is the field which involves packing more and more logic devices into smaller and smaller areas. Thanks to VLSI, circuits that would have taken boardfuls of space can now be put into a small space few millimeters across! This has opened up a big opportunity to do things that were not possible before. VLSI circuits are everywhere ... your compu...

Efficient VLSI Fault Simulation

Simulation of Complete VLSI Fabrication Processes with Heterogeneous Simulation Tools

An integrated environment for the simulation of VLSI fabrication processes is presented. Emphasis is put on automated operation to achieve maximum efficiency in TCAD deployment. Addressing the increasing number and diversity of process steps in state-of-the-art semiconductor fabrication processes, mechanisms have been devised to support the smooth, automatic interaction of heterogeneous simulat...

Towards large scale optimistic VLSI simulation

In this paper, an optimistic parallel and distributed logic simulator, XTW, is proposed. In XTW, a new event scheduling mechanism, XEQ, and a new rollback procedure, rb-messages, are proposed for use in optimistic logic simulation. XTW groups LPs into clusters, and makes use of a multi-level queue, XEQ, to schedule events in the cluster. XEQ has an O(1) event scheduling time complexity. Our new...