Ultrathin Sub-5-nm Hf??<i>?</i>Zr<i>?</i>O? for a Stacked Gate-all-Around Nanowire Ferroelectric FET With Internal Metal Gate

نویسندگان

چکیده

This study investigates a device’s ability to boost its on-state current and subthreshold behavior using ferroelectric field-effect transistor (FeFET) with an ultrathin sub-5-nm Hf 1-x Zr x O2 (HZO). A conventional (FET) pure hafnium (HfO xmlns:xlink="http://www.w3.org/1999/xlink">2 ) is used as control measure the impact of internal metal gate (IMG) also discussed. The was conducted by HZO seed layer fabricate gate-all-around (GAA) nanowire (NW); FeFET metal-ferroelectric–metal-insulator-semiconductor (MFMIS) structure; double (DL) channel. channel size in experiment approximately $9.6\times16$ nm 2 total thickness stack 9.2 nm. 50.5% less than our previous experiment. exhibits considerably high notation="LaTeX">${I}_{on}$ – notation="LaTeX">${I}_{off}$ ratio exceeding 107. IMG serves potential equalizer material arranged more symmetrical electric field. results lower (sub- notation="LaTeX">${V}_{TH}$ swing ( notation="LaTeX">$S.S._{min}=$ 49.3mV/decade) wide range notation="LaTeX">$10^{3}$ drain currentcompared that without IMG. findings indicate high-performance GAA FET can be achieved combining DL channel, NW, material,

برای دانلود باید عضویت طلایی داشته باشید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Vertically-stacked gate-all-around polysilicon nanowire FETs with sub-lm gates patterned by nanostencil lithography

0167-9317/$ see front matter 2012 Elsevier B.V. A http://dx.doi.org/10.1016/j.mee.2012.07.048 ⇑ Corresponding author. E-mail address: [email protected] (D. Sacch We report on the top-down fabrication of vertically-stacked polysilicon nanowire (NW) gate-all-around (GAA) field-effect-transistors (FET) by means of Inductively Coupled Plasma (ICP) etching and nanostencil lithography. The nan...

متن کامل

On Channel Shape Variation of 10-nm-Gate Gate-All-Around Silicon Nanowire MOSFETs

Recently, gate-all-around (GAA) nanowire field effect transistors (NWFETs) have attracted increasing attention due to their superior gate control and short channel effect immunity [1-4]. However, confined by the limitation of manufacturing process, the different aspect ratio (AR) results in different shapes of channel cross section, such as ellipse-shaped or rectangular-shaped instead of the id...

متن کامل

Performance Study and Analysis of Heterojunction Gate All Around Nanowire Tunneling Field Effect Transistor

In this paper, we have presented a heterojunction gate all around nanowiretunneling field effect transistor (GAA NW TFET) and have explained its characteristicsin details. The proposed device has been structured using Germanium for source regionand Silicon for channel and drain regions. Kane's band-to-band tunneling model hasbeen used to account for the amount of band-to...

متن کامل

A Gate-All-Around Floating-Gate Memory Device with Triangular-Shaped Poly-Si Nanowire Channels

A novel gate-all-around (GAA) poly-Si nanowire (NW) floating gate (FG) memory device was fabricated and characterized. The enhanced electric field around the corners of the nanowire channels boosts the P/E process and thus the operation voltages are dramatically lowered. Furthermore, the non-localized trapping feature characteristic of the FG makes the injection or ejection of electrons easier ...

متن کامل

Investigation of Strain Profile Optimization in Gate-All-Around Suspended Silicon Nanowire FET

In this paper, we investigate the optimization of tensile strain caused by thermal oxidation in a doubly-clamped silicon nanowire FET to enhance the mobility of its carriers. Spacer technology combined with sacrificial oxidations was used to fabricate ≈ 100 nm wide nanowires. The temperature and the duration of sacrificial wet oxidation are the main parameters that determine the induced strain....

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: IEEE Journal of the Electron Devices Society

سال: 2021

ISSN: ['2168-6734']

DOI: https://doi.org/10.1109/jeds.2021.3056438