Two Layer 3D Floor Planning

Two Layer 3D Floor Planning

A 3D floor plan is a non-overlapping arrangement of blocks within a large box. Floor planning is a central notion in chip-design, and with recent advances in 3D integrated circuits, understanding 3D floor plans has become important. In this paper, we study so called mosaic 3D floor plans where the interior blocks partition the host box under a topological equivalence. We give representations wh...

Microfluidic Chip Floor-planning

During last decade, microfluidic chips proved to be a powerful instrument in microbiology and biological chemistry. [1] Still, microfluidics has lots of unrealized potential partially due to a lack of adequate design tools. In this project, we’ll deal with one of the chip layout generation tools, the floor-planner. Schematically, a chip layout is shown in figure 1. In the plot, rectangles repre...

2D-3D vortex-line transition in two-layer Josephson arrays.

We calculate the dynamical response of two-layer Josephson arrays to a bias current applied into only one layer (primary layer), in a perpendicular magnetic field. The pancake vortices in the two layers sometimes form into flux lines which move as a unit under the influence of the bias current. The lines break apart into independent pancakes in sufficiently high currents, sufficiently weak inte...

A Genetic Algorithm for Vlsi Floor Planning

The classical floor planning techniques use block packing to minimize chip area, by making use of algorithms like B-TREE representation, simulated annealing. To get an optimal solution it is imperative to choose an efficient, cost effective algorithm. This paper presents a genetic algorithm to provide a solution to the floor planning technique. It incorporates slicing tree construction process ...

Floor-Planning via Orderly Spanning Trees