The Dual Effects of Gate Dielectric Constant in Tunnel FETs
نویسندگان
چکیده
منابع مشابه
Asymmetrically strained all-silicon multi-gate n-Tunnel FETs
0038-1101/$ see front matter 2010 Elsevier Ltd. A doi:10.1016/j.sse.2010.04.037 * Corresponding author. Tel.: +41 21 693 5633; fax E-mail address: [email protected] (M This paper reports all-silicon asymmetrically strained Tunnel FET architectures that feature improved subthreshold swing and Ion/Ioff characteristics. We demonstrate that a lateral strain profile corresponding to at leas...
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Device Modeling of Tunnel FETs
あらまし CMOSの微細化限界などによる新原理トランジスタの候補として,トンネル FETの研究が行われ ている.筆者らは,成熟したシリコン技術を用いて,トンネル FET の試作・評価を行うのと並行し,デバイス シミュレーションを用いたモデリングを実施した.最初にバンド間トンネルのモデル化について,その仮定・精 度を実測と比較しながら検討し,非局所電界に基づくモデルを採用した.デバイスの設計指針や,実測される電 気特性の解釈には,そのモデルを用いたデバイスシミュレーションを使用した.応用の側面から回路シミュレー ションが必要となり,素子動作のコンパクトモデル化を,デバイスモデリングの経緯に基づいて行い,そのモデ ルは回路応用上の課題の検討に用いられた.また,このように新デバイスの開発とモデリングを同時並行に進め ることは,双方にとって大きなメリットがある. キーワード トンネル FET...
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ژورنال
عنوان ژورنال: IEEE Journal of the Electron Devices Society
سال: 2016
ISSN: 2168-6734
DOI: 10.1109/jeds.2016.2610478