The Constant Multiplier FFT

In this paper, we present a new fast Fourier transform (FFT) hardware architecture called constant multiplier (CM) FFT. Whereas rotators in previous architectures must rotate among several different angles, the CM FFT exploits use of multipliers to calculate rotations. The paper explores 4-parallel and 8-parallel radix-2 FFT, which calculates entirely by using multipliers. Later, radices 2 k are presented, with emphasis xmlns:xlink="http://www.w3.org/1999/xlink">4 xmlns:xlink="http://www.w3.org/1999/xlink">5 as best alternatives. Experimental results for 1024-point show that proposed approach reduces number block random-access memories (BRAM) digital signal processing (DSP) slices respect approaches, while achieving highest clock frequency on field-programmable gate arrays (FPGAs) reported so far.