Suppressing Quadrature Error and Harmonics in Resolver Signals via Disturbance-Compensated PLL

نویسندگان

چکیده

The aim of this study was to obtain accurate angular positions and velocities from resolver signals; resolver-to-digital conversion (RDC) often adopts a phase-locked loop (PLL) as demodulation algorithm. However, signals come with quadrature errors harmonics, which lead severe reduction in PLL accuracy. conventional does not consider the impact error, bandwidth is much larger than fundamental frequency for pursuing low dynamic error. These reasons render retention harmonics results. In paper, disturbance-compensated (DC-PLL) proposed, consists phase detector suppressing error (SQEH-PD) second-order observer. Firstly, since change angle velocity, pre-estimated used SQEH-PD compensate signals. Secondly, although changes amplitudes do change. Therefore, estimated position are Thirdly, observer designed estimate velocity by regulating Compared PLL, proposed DC-PLL has stronger anti-disturbance ability against configurating have linear relation. Simulation experimental results prove effectiveness method.

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ژورنال

عنوان ژورنال: Machines

سال: 2022

ISSN: ['2075-1702']

DOI: https://doi.org/10.3390/machines10080709