SMT Sampling via Model-Guided Approximation

We investigate the domain of satisfiable formulas in satisfiability modulo theories (SMT), particular, automatic generation a multitude satisfying assignments to such formulas. Despite long and successful history SMT model checking formal verification, this aspect is relatively under-explored. Prior work exists for generating assignments, or samples, Boolean quantifier-free first-order involving bit-vectors, arrays, uninterpreted functions (QF_AUFBV). propose new approach that suitable theory T integer arithmetic with arrays functions. The involves reducing general sampling problem simpler instance from set independent intervals, which can be done efficiently. Such reduction carried out by expanding single model—a seed—using top-down propagation constraints along original formula.