Single-Stage Vernier Time-to-Digital Converter with Sub-Gate Delay Time Resolution
نویسندگان
چکیده
منابع مشابه
Single-Stage Vernier Time-to-Digital Converter with Sub-Gate Delay Time Resolution
This paper presents a single-stage Vernier Time-to-Digital Converter (VTDC) that utilizes the dynamic-logic phase detector. The zero dead-zone characteristic of this phase detector allows for the single-stage VTDC to deliver sub-gate delay time resolution. The single-stage VTDC has been designed in 0.13 μm CMOS technology. The simulation results demonstrate a linear input-output characteristic ...
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ژورنال
عنوان ژورنال: Circuits and Systems
سال: 2011
ISSN: 2153-1285,2153-1293
DOI: 10.4236/cs.2011.24050