Semiconductor Packaging Technology for 3D Assembly
نویسندگان
چکیده
منابع مشابه
Semiconductor Packaging Assembly Technology
This chapter describes the fundamentals of the processes used by National Semiconductor to assemble IC devices in electronic packages. Electronic packaging provides the interconnection from the IC to the printed circuit board (PCB). Another function is to provide the desired mechanical and environmental protection to ensure reliability and performance. Three fundamental assembly flow processes ...
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Increasing demand for new and more advanced electronic products with a smaller form factor, superior functionality and performance with a lower overall cost has driven semiconductor industry to develop more innovative and emerging advanced packaging technologies. One of the hottest topics in the semiconductor industry today is a 3D packaging using Through Silicon Via (TSV) technology. Driven by...
متن کامل3D Packaging Architectures and Assembly Process Design
2D Two dimensional 3D Three dimensional BEOL Back end of line BI Burn-In CMP Chemical mechanical polishing D2D Die-to-die D2W Die-to-wafer ECD Electro-chemical deposition ECG Deleted in chapter EMIB Embedded multi-die interconnect bridge FEOL Front end of line IP Intellectual property KGD Known good die KOZ Keep out zone MCM Multi chip module MCP Multi chip package MEOL Middle end of line MPM M...
متن کاملReliability challenges in 3D IC packaging technology
0026-2714/$ see front matter 2010 Elsevier Ltd. A doi:10.1016/j.microrel.2010.09.031 E-mail address: [email protected] At the moment, a major paradigm change, from 2D IC to 3D IC, is occurring in microelectronic industry. Joule heating is serious in 3D IC, and vertical interconnect is the critical element to be developed. Also reliability concerns will be extremely important. For example, in order ...
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ژورنال
عنوان ژورنال: Journal of The Japan Institute of Electronics Packaging
سال: 2014
ISSN: 1343-9677,1884-121X
DOI: 10.5104/jiep.17.169