Self-Adaptive Run-Time Variable Floating-Point Precision for Iterative Algorithms: A Joint HW/SW Approach

Using standard Floating-Point (FP) formats for computation leads to significant hardware overhead since these are over-designed error-resilient workloads such as iterative algorithms. Hence, FP Unit (FPU) architectures need run-time variable precision capabilities. In this work, we propose a new method and an FPU architecture that enable designers dynamically tune computations’ automatically at called Variable Precision in Time (VPT), leading power consumption, execution time, energy savings. spite of its circuit area overhead, the proposed approach simplifies integration existing software any level stack (OS, RTOS, or application-level): it only requires lightweight support solely relies on traditional assembly instructions, without specialized compiler custom instructions. We apply technique Jacobi Gauss–Seidel methods taking full advantage suggested FPU. For each algorithm, two modified versions proposed: conservative version relaxed one. Both algorithms analyzed compared statistically understand effects VPT applications. The implementations demonstrate up 70.67% consumption saving, 59.80% time 88.20% total saving w.r.t reference double implementation, with no accuracy loss.