Return to-zero feedback insertion in a continuous time Delta-Sigma modulator for excess loop delay compensation

نویسندگان
چکیده

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Digital excess loop delay compensation technique with embedded truncator for continuous-time delta–sigma modulators

ELECT A novel implementation is proposed to relax the specifications of the internal feedback path for a continuous-time delta–sigma modulator. A truncator is embedded into the digital excess loop delay (ELD) compensation path. Thermometer-coded truncation is achieved by reordering the reference voltages of the internal quantiser. This requires only a small amount of extra digital circuitry com...

متن کامل

Clock Jitter and Excess Loop Delay in Continuous-Time Delta-Sigma Modulators

Continuous-time ∆Σ modulators are able to operate at higher frequencies than their discrete-time counterparts. However, they suffer more severely from non-idealities such as clock jitter and excess loop delay. The effects of these two non-idealities are explained and a continuous-time to discrete-time conversion method is presented in order to aid in the analysis of these non-idealities. Two ci...

متن کامل

Excess Loop Delay compensated Electro-Mechanical Bandpass Sigma-Delta Modulator for Gyroscopes

This paper presents a new excess loop delay (ELD) compensated micro-electro-mechanical sigma-delta modulator (Σ∆M) incorporating a gyroscope in series with a second-order electrical bandpass filter. The bandpass filter is optimized for large ELDs and is realized in a feedforward structure. The Σ∆M is implemented on a field programmable gate array (FPGA) emulating continuous-time (CT) behavior i...

متن کامل

Continuous-Time Delta-Sigma Modulator Model for A/D Conversion

In this paper we present a study of a Continuous-Time Delta-Sigma Modulator (CT ∆ΣM) to be applied in radio communication systems, including a high-level modelization for simulation purposes. The conventional sample-and-hold and comparator blocks, very popular in CT ∆ΣM models, are replaced by an analog-to-digital converter (ADC), in order to allow the ADC modelization. In this way, we propose ...

متن کامل

Clock jitter error in multi-bit continuous-time sigma-delta modulators with non-return-to-zero feedback waveform

This paper presents a detailed study of the clock jitter error in multi-bit continuous-time ΣΔ modulators with non-return-to-zero feedback waveform. It is demonstrated that jitterinduced noise power can be separated into two main components: one that depends on the modulator loop filter transfer function and the other dependent on input signal parameters, i.e. amplitude and frequency. The latte...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: IEICE Electronics Express

سال: 2004

ISSN: 1349-2543

DOI: 10.1587/elex.1.568