Relationship of drain induced barrier lowering and top/bottom gate oxide thickness in asymmetric junctionless double gate MOSFET

The relationship of drain induced barrier lowering (DIBL) phenomenon and channel length, silicon thickness, thicknesses top bottom gate oxide films is derived for asymmetric junctionless double (JLDG) MOSFETs. characteristics between the current voltage by using potential distribution model to propose in this paper. In case, threshold defined as corresponding when (W/L) × 10-7 A, DIBL representing change with respect obtained. As a result, we observe proportional negative third power length second thickness linearly geometric mean thicknesses, derive relation such =25.15ηL_g^(-3) t_si^2 √(t_ox1∙t_ox2 ), where η static feedback coefficients 0 1. found be 0.5 1.0 model. paper has been observed good agreement result other paper, so it can used circuit simulation SPICE.