Real-time fast learning hardware implementation
نویسندگان
چکیده
Machine learning algorithms are widely used in many intelligent applications and cloud services. Currently, the hottest topic this field is Deep Learning represented often by neural network structures. fully known as deep network, artificial a typical machine method an important way of learning. With massive growth data, research has made significant achievements natural language processing (NLP), image recognition, autonomous driving. However, there still breakthroughs needed training time energy consumption Based on our previous fast architecture for paper, solution to minimize connected analysed theoretically. Therefore, we propose new parallel algorithm structure with over-tuned parameters. This strategy finally leads adaptation delay impact performance analyzed using simple benchmark case study. It shown that reduction step size could be proposed compensate errors due delayed adaptation, then gain phase function parameters chosen Finally, realize real-time learning, implemented FPGA parallelism flexibility, integration shows good low power consumption.
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ژورنال
عنوان ژورنال: International Journal for Simulation and Multidisciplinary Design Optimization
سال: 2023
ISSN: ['1779-627X', '1779-6288']
DOI: https://doi.org/10.1051/smdo/2023001