Quasi-Resonant Interconnects: A Low Power, Low Latency Design Methodology
نویسندگان
چکیده
منابع مشابه
Low Power Quasi-Resonant Interconnects
A primary challenge in high performance, high complexity integrated circuits is the on-chip interconnect [1]. Transmitting clock, data, and communications signals over large die areas requires long interconnections among the various circuit modules. Consequently, as technology scales, the interconnect cross section decreases while operating frequencies have increased. The impact of these trends...
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ژورنال
عنوان ژورنال: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
سال: 2009
ISSN: 1063-8210
DOI: 10.1109/tvlsi.2008.2011197