Power Efficient VLSI Inverter Design using Adiabatic Logic and Estimation of Power dissipation using VLSI-EDA Tool
نویسندگان
چکیده
منابع مشابه
Efficiency of Adiabatic Logic for Low-Power VLSI Using Cascaded ECRL And PFAL Inverter
The energy stored at the output can be retrieved by the reversing the current source direction discharging process instead of dissipation in NMOS network. Hence adiabatic switching offers the less energy dissipation in PMOS network and reuse the stored energy in the output capacitance by reversing the current source direction. There are the many adiabatic logic design technique are given in Lit...
متن کاملDesign of Low Power VLSI Circuits using Energy Efficient Adiabatic Logic
Abstract—In this paper, a new design of adiabatic circuit, called energy efficient adiabatic logic (EEAL) is proposed. Earlier various diode based adiabatic logic families have been proposed. To achieve minimum energy consumption, this paper proposes a technique in which diode is replaced by MOS transistor at charging and discharging path whose gate is controlled by the power clocks. By using t...
متن کاملDesign of Low Power Vlsi Circuits Using Cascode Logic Style
Due to the trade-off between power, area and performance, various efforts have been done. This work is also based to reduce the power dissipation of the vlsi circuits with the performance upto the acceptable level. The dominant term in a well designed vlsi circuit is the switching power and low-power design thus becomes the task of minimizing this switching power. So, to design a low-power vlsi...
متن کاملDesign and Analysis of Conventional CMOS and Energy Efficient Adiabatic Logic for Low Power VLSI Application
In recent years, low power circuit design has been an important issue in VLSI design areas. Adiabatic logics, which dissipate less power than static CMOS logic, have been introduced as a promising new approach in low power circuit design. energy. This paper proposes an Adder circuit based on energy efficient two-phase clocked adiabatic logic. A simulative investigation on the proposed 1-bit ful...
متن کاملEfficiency of Adiabatic Logic for Low-Power, Low-Noise VLSI
ln this paper, the efficiency of a fully adiabatic logic circuit is compared with its combinational and pipelined static CMOS counterparts. The performance of each circuit is studied in terms of the maximum frequency of operation, the minimum voltage of operation, the circuit energy consumption, and the switching noise generated by the circuit. An 8-bit carry look-ahead adder is designed using ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: International Journal of Computer and Communication Technology
سال: 2012
ISSN: 2231-0371,0975-7449
DOI: 10.47893/ijcct.2012.1132