Parity Check Based Fault Detection against Timing Fault Injection Attacks

Fault injection technologies can be utilized to steal secret information inside integrated circuits (ICs), and thus cause serious security threats. Parity check has been adopted as an efficient method against fault attacks. However, the contradiction between overhead restricts further development applications of parity in detection. This paper proposes two methods, mixed-grained word recombination check, based on for trade-off overhead. The efficiency proposed approaches is verified RC5, AES, DES encryption implementations by clock glitch attack. Compared with traditional coverage rate approach increased up 53.69% consuming 13.2% registers more. Against 47.16% using only 2.35% register provide IC designers countermeasure options targeting different design skills specifications.