Noise-Reduced and PVT-Robust Double-Balanced CMOS Mixer Using Common-Mode Feedback

This paper presents a noise reduction technique using common-mode feedback in active CMOS mixers. The proposed decreases the noise, thus reducing common-to-differential conversion arising from mismatch and process variations. In addition, reduces sensitivity to process, voltage, temperature (PVT) variations due negative feedback. A theory is adopted analyze low-noise performance of technique. theoretical analysis validated by simulations measurements. conventional mixers are fabricated 65-nm process. Measurement results mixer operating at an RF 2.1 GHz show gain 21.5 dB, input-referred third-order intercept point (IIP3) -16.2 dBm, flicker figure 8.7 dB 10 kHz while it dissipates 3.45 mW 1.5 V supply voltage. Measurements also 10.1 kHz, without degradation other characteristics. It demonstrated that can be applied decrease phase self-oscillating (SOM) low mixer.