ISODATA SOPC-FPGA implementation of image segmentation using NIOS-II processor

Embedded Sopc Design with Nios Ii Processor and Vhdl Examples

Multimedia Decoder Using the Nios II Processor

Design Introduction Our design target was to build a low-cost, high-performance H.264 decoder with a prototype H.264 decoder created using multiple small FPGAs. H.264 is a computationally complex, advanced video standard for achieving high compression ratios. To cater to the needs of high throughput applications such as HDTV, which requires 216,000 macroblocks/second of throughput, designers us...

MRI Spinal Segmentation Based on the Nios II Processor

As fast-developing medical imaging technology promotes modern medicine, computed tomography (CT), magnetic resonance imaging (MRI), and positron emission tomography (PET) are becoming widely used in clinical diagnosis and analysis. These systems have developed from tools for noninvasive examination and anatomical structure visualization to operation planning and simulation, operation navigation...

Nios II Processor Reference Handbook

FPGA-Based Clinical Diagnostic System using Pipelined Architectures in the Nios II Soft-Core Processor

Clinical decision making is a complicated process. It is based on medical knowledge derived from medical books and literature and on data obtained from various clinical trials and diagnostic tests; however, it is also dependent on experience, judgment, and reasoning, which are functions of the human brain. In many situations, human decision making is not available, and in these situations, inst...