Integrated extreme gradient boost with c4.5 classifier for high level synthesis in very large scale integration circuits

High-level synthesis (HLS) is utilized for high-performance and energy-efficient heterogeneous systems designing. HLS assist in field-programmable gate array circuits designing where hardware implementations are refined replaced target device. However, the power-process-voltage-temperature-delay (PPVTD) variation VLSI undergoes many problems reduced performance. In order to address these problems, C4.5 with eXtreme Gradient Boosting Classification based High Level Synthesis (C4.5-XGBCHLS) Method designed afford better runtime adaptability (RA) minimal error rate. using behavioral input results measured at running condition. When circuit’s get reduced, language description of circuit considered as an input. Then, compilation process convert high level specification into Intermediate Representation (IR) control/data flow graph (CDFG). CDFG computes data control dependencies among operations. (XGBoost) Classifier exploited C4.5-XGBCHLS method classify causing functional unit (FU) XGBoost decision tree base classifier enhance classification FU circuits. After that, gets allocated place from library on design objectives PPVTD variations. Finally, operation scheduling binding executed register transfer (RTL) generation form improved RA. The simulation shows that enhances performance selection accuracy (FUSA) rate (ER) time (CAT).