Improvement of Phase Noise in Frequency Synthesizer with Dual PLL
نویسندگان
چکیده
منابع مشابه
Low Phase Noise Cmos Pll Frequency Synthesizer Design and Analysis
Title of dissertation: LOW PHASE NOISE CMOS PLL FREQUENCY SYNTHESIZER DESIGN AND ANALYSIS Xinhua He, Doctor of Philosophy, 2007 Dissertation directed by: Professor Robert Newcomb Department of Electrical and Computer Engineering The phase-locked loop (PLL) frequency synthesizer is a critical device of wireless transceivers. It works as a local oscillator (LO) for frequency translation and chann...
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ژورنال
عنوان ژورنال: The Journal of Korean Institute of Electromagnetic Engineering and Science
سال: 2014
ISSN: 1226-3133
DOI: 10.5515/kjkiees.2014.25.9.903