Hardware support for memory protection in sensor nodes
نویسندگان
چکیده
منابع مشابه
Hardware/Compiler Memory Protection in Sensor Nodes
With reference to sensor node architectures, we consider the problem of supporting forms of memory protection through a hardware/compiler approach that takes advantage of a low-cost protection circuitry inside the microcontroller, interposed between the processor and the storage devices. Our design effort complies with the stringent limitations existing in these architectures in terms of hardwa...
متن کاملSoftware-Based Memory Protection In Sensor Nodes
Typical sensor nodes are resource constrained microcontrollers containing user level applications, operating system components, and device drivers in a single address space, with no form of memory protection. A programming error in an application can easily corrupt the state of the operating system and other software components on the node. In this paper, we propose a memory protection scheme t...
متن کاملIntellectual Property Protection for Embedded Sensor Nodes
Embedded Sensor Networks are deeply immersed in their environment, and are difficult to protect from abuse or theft. Yet the software contained within these remote sensors often represents years of development, and requires adequate protection. We present a software based solution for the Texas Instruments C5509A DSP processor which uses object-code encryption and public-key key exchange with a...
متن کاملPolicy-Driven Memory Protection for Reconfigurable Hardware
While processor based systems often enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reconfigurable hardware typically offer no such protection. Several reconfigurable cores are often integrated onto a single chip where they share external resources such as memory. While this enables small form factor and low cost designs, it op...
متن کاملOS Support for Virtualizing Hardware Transactional Memory
Transactional memory promises to simplify multithreaded programming. Hardware TM (HTM) implementations promise better performance by augmenting processors with transactional state. However, HTMs interact poorly with the operating system or virtual machine monitor. For example, they often do not tolerate OS actions that virtualize processors and memory, such as context switching and paging. With...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Microprocessors and Microsystems
سال: 2014
ISSN: 0141-9331
DOI: 10.1016/j.micpro.2014.01.004