Fully CMOS-compatible passive TiO2-based memristor crossbars for in-memory computing

Brain-inspired computing and neuromorphic hardware are promising approaches that offer great potential to overcome limitations faced by current paradigms based on traditional von-Neumann architecture. In this regard, interest in developing memristor crossbar arrays has increased due their ability natively perform in-memory fundamental synaptic operations required for neural network implementation. For optimal efficiency, crossbar-based circuits need be compatible with fabrication processes materials of industrial CMOS technologies. Herein, we report a complete CMOS-compatible process TiO2-based passive crossbars 700 nm wide electrodes. We show successful bottom electrode damascene process, resulting an optimised topography surface roughness as low 1.1 nm. DC sweeps voltage pulse programming yield statistical results related synaptic-like multilevel switching. Both cycle-to-cycle device-to-device variability investigated. Analogue the conductance using sequences 200 ns pulses suggest fabricated memories have capacity at least 3 bits reproducibility.