Fault-tolerant sub-lithographic design with rollback recovery

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Fault-tolerant sub-lithographic design with rollback recovery.

Shrinking feature sizes and energy levels coupled with high clock rates and decreasing node capacitance lead us into a regime where transient errors in logic cannot be ignored. Consequently, several recent studies have focused on feed-forward spatial redundancy techniques to combat these high transient fault rates. To complement these studies, we analyze fine-grained rollback techniques and sho...

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Increasing chip density combined with heightened reliability expectations has spawned greater interest in fault tolerant design. In recent years, research into rollback and retry techniques has established them as an e ective approach to recovery from transient and intermittent faults. For applications with strict timing requirements, however, the high error latency inherent in retry approaches...

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ژورنال

عنوان ژورنال: Nanotechnology

سال: 2008

ISSN: 0957-4484,1361-6528

DOI: 10.1088/0957-4484/19/11/115708