Energy Efficient Computing Systems: Architectures, Abstractions and Modeling to Techniques and Standards

Computing systems have undergone several inflexion points - while Moore's law guided the semiconductor industry to cram more and transistors logic into same volume, limits of instruction-level parallelism (ILP) end Dennard's scaling drove towards multi-core chips. We now entered era domain-specific architectures for new workloads like AI ML. These trends continue, arguably with other limits, along challenges imposed by tighter integration, extreme form factors diverse workloads, making complex from an energy efficiency perspective. Many research surveys covered different aspects techniques in hardware microarchitecture across devices, servers, HPC, data center software, algorithms, frameworks thermal management. Somewhat parallel, has developed standards around specification, modeling verification chips; these areas not been addressed detail previous surveys. This survey aims bring domains together is composed a systematic categorization key building efficient (a) specification ability precisely specify power intent or properties at layers (b) simulation entire system subsystem (hardware software both) so as be able perform what-if analysis, (c) used implementing levels stack, (d) provide guarantees that functionality designs are preserved, (e) consortiums aim standardize efficiency, including cross-layer optimizations.