Energy Efficient Architecture for “High Latitudes”
نویسندگان
چکیده
منابع مشابه
High Performance and Energy Efficient SRAM-based Architecture for TCAM
Content addressable memory (CAM) is a type of solid-state memory in which data is provided as input and an operation is performed to returns the address as output. Unlike other memories (SRAM, DRAM), it performs the search operation in parallel on complete location at once, offered significant reduction in searching time. A ternary content addressable memory (TCAM) is a specialized CAM design f...
متن کاملHigh throughput energy efficient multi - FFT architecture on FPGAs ( Draft ) ∗
To process high-rate streaming data, throughput is one of the key performance metrics for FFT design. However, high throughput FFT architectures consume large amount of power due to complex routing or excessive memory access. In this paper, we propose a Cooley-Turkey algorithm based, high throughput energy-efficient multi-FFT architecture. In the proposed architecture, we use multiple time-mult...
متن کاملHigh Performance and Energy Efficient Serial Prefetch Architecture
Energy efficient architecture research has flourished recently, in an attempt to address packaging and cooling concerns of current microprocessor designs, as well as battery life for mobile computers. Moreover, architects have become increasingly concerned with the complexity of their designs in the face of scalability, verification, and manufacturing concerns. In this paper, we propose and eva...
متن کاملEnergy Efficient Sustainable Routing Architecture for Manet
The Iternet of Things(IOT) is acknowledged as one of the most significant areas of upcoming technology and is gaining vast attention from a wide range of industries, Agriculture, Education, Telehealth, etc. IoT is a combination of various resource constrained networks like WSN and MANET where the limited battery power is a serious issue. In addition to this reliability and performance of the ph...
متن کاملA Novel Architecture For An Energy Efficient And High Speed Sar Adc
This brief involves the design and implementation of an energy-efficient and high speed SAR ADC. The DAC would be designed to reduce the power consumption by applying a switching scheme. The architecture of SAR module provides improved speed of conversion. Power consumption is one of the main design constraints in today ICs. For systems that are powered by small non rechargeable batteries over ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: IOP Conference Series: Materials Science and Engineering
سال: 2020
ISSN: 1757-899X
DOI: 10.1088/1757-899x/753/4/042033