Efficient Management of Cache Accesses to Boost GPGPU Memory Subsystem Performance

نویسندگان
چکیده

برای دانلود باید عضویت طلایی داشته باشید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Data Cache Performance When Vector-Like Accesses Bypass the Cache

A Stream Memory Controller, when added to a conventional memory hierarchy, routes vector-like accesses around the data cache. A memory system was simulated under these conditions and the data cache performance increased dramatically. The gain in performance was a result of the increased temporal locality of the access pattern. The access pattern also showed a decrease in spatial locality, makin...

متن کامل

Performance Analysis of Wrong-Path Data Cache Accesses

The performance of today's high-end microprocessors continues to grow. This increase in performance is due in part to the use of speculative, out-of-order execution, coupled with highly accurate branch prediction. However, even with branch prediction accuracies over 90%, many instructions are executed unnecessarily from the wrong path. This wrong-path execution results in cache pollution and un...

متن کامل

High Performance Simulators Analyzing the Efficient Cache Memory Simulation Behavior

High performance is the major concern in VLSI Design. Thus, the architecture behavior of the cache governs both high performance and low power consumption. High performance simulator simulates cache memory design in various formats with help of various simulators like simplescalar, Xilinx, Top spice 8 etc. This paper explores the issue and consideration involved in designing the efficient cache...

متن کامل

Cache-Conscious Memory Management

Dynamic memory allocation must solve the re-allocation problem: where to place a new object. Current techniques of malloc and GC are designed with cache locality in mind. However, it is unclear how to cleanly separate the locality effect in these techniques. This paper outlines a locality theory for dynamic memory allocation. It presents a new metric called the reallocation distance, a way to c...

متن کامل

A Scalable, Cache-Based Queue Management Subsystem for Network Processors

Abstract— Queues are a fundamental data structure in packet processing systems. In this short paper, we propose and discuss a scalable queue management (QM) building block for network processors (NPs). We make two main contributions: 1) we argue qualitatively and quantitatively that caching can be used to improve both bestand worst-case queuing performance, and 2) we describe and discuss our pr...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: IEEE Transactions on Computers

سال: 2019

ISSN: 0018-9340,1557-9956,2326-3814

DOI: 10.1109/tc.2019.2907591