Early power estimation for VLSI circuits

Power Simulation and Estimation in VLSI Circuits

In the past the major concerns of the VLSI designer were area speed and cost power consideration was typically of secondary importance In recent years how ever this has begun to change and increasingly power is being given comparable weight to other design considerations Several factors have contributed to this trend including the remarkable success and growth of the class of battery powered pe...

Peak power estimation of VLSI circuits: new peak power measures

New measures of peak power are proposed in the context of sequential circuits, and an efficient automatic procedure is presented to obtain very good lower bounds on these measures, as well as providing the actual input vectors that attain such bounds. Automatic generation of a functional vector loop for near-worst case power consumption is also attained. Experiments show that vector sequences g...

A survey of power estimation techniques in VLSI circuits

With the advent of portable and high-density microelectronic devices, the power dissipation of very large scale integrated (VLSI) circuits is becoming a critical concern. Accurate and e cient power estimation during the design phase is required in order to meet the power speci cations without a costly redesign process. In this paper, we present a review/tutorial of the power estimation techniqu...

Optimization Techniques for Low Power VLSI Circuits

Power dissipation has emerged as an important design parameter in the design of microelectronic circuits, especially in portable computing and personal communication applications. In this paper, we survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. Optimizations at the circuit, logic, architectural and system levels are considered.

Power Minimisation Techniques for Testing Low Power VLSI Circuits