منابع مشابه
FSM Modeling of Synchronous VHDL Design for Symbolic Model Checking
* This work was supported by Chinese National Key Project funds under the grants 96-738-01-01-07. Abstract: In this paper, we defined a new FSM model that based on the synchronous behavior and symbolic representation technique. The algorithm to elaborate the model from the VHDL description of synchronous circuits is presented. By eliminating the unnesessary transition function, our model has mu...
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ژورنال
عنوان ژورنال: Radio Electronics, Computer Science, Control
سال: 2020
ISSN: 2313-688X,1607-3274
DOI: 10.15588/1607-3274-2020-2-14