Design-Time Reference Current Generation for Robust Spintronic-Based Neuromorphic Architecture

Neural Networks (NN) can be efficiently accelerated in a neuromorphic fabric based on emerging resistive non-volatile memories (NVM), such as Spin Transfer Torque Magnetic RAM (STT-MRAM). Compared to other NVM technologies, STT-MRAM offers many benefits, fast switching, high endurance, and CMOS process compatibility. However, due its low ON/OFF-ratio, variations runtime temperature fluctuations lead miss-quantizing the sensed current turn, degradation of inference accuracy. In this paper, we analyze impact accumulated variation accuracy Binary NNs propose design-time reference generation method improve robustness implemented NN under different scenarios (up 125 °C). Our proposed is robust both variations. The improves by up \(20.51\% \) MNIST, Fashion-MNIST, CIFAR-10 benchmark datasets presence without additional hardware overhead compared existing solutions.