Design of broadband high-gain GaN MMIC power amplifier based on reactive/resistive matching and feedback technique

Design of X Band High Power Amplifier MMIC Based on AlGaN/GaN HEMT

In this paper, we have presented an X band high power amplifier based on MMIC (Monolithic Microwave Integrated Circuit) technology for satellite remote sensing systems. We have used GaN HEMT process with 500 nm gate length technology with VD= 40 V and VG= -2 V in class E structure. The proposed two-stage power amplifier provides 25 dB power gain with maximum output power of 49.3 dBm at 10 GHz. ...

Design of High Gain Wideband Low Noise Amplifier based on Matching technique for Multiple Applications

Increasing demands of portable wireless devices have motivated the development of CMOS radio frequency integrated circuits (RFIC). In wireless system Low Noise Amplifier is the first stage of any RF Receiver design. Performance of RF receiver mainly depends on the effectiveness of LNA. The main objective of the LNA design is to get good gain with minimum noise generation for the entire operatin...

Analysis and Design of High Gain, and Low Power CMOS Distributed Amplifier Utilizing a Novel Gain-cell Based on Combining Inductively Peaking and Regulated Cascode Concepts

In this study an ultra-broad band, low-power, and high-gain CMOS Distributed Amplifier (CMOS-DA) utilizing a new gain-cell based on the inductively peaking cascaded structure is presented. It is created bycascading of inductively coupled common-source (CS) stage and Regulated Cascode Configuration (RGC).The proposed three-stage DA is simulated in 0.13 μm CMOS process. It achieves flat and high ...

Design of High Efficiency Broadband Adjusted Class AB Power Amplifier

analysis and design of high gain, and low power cmos distributed amplifier utilizing a novel gain-cell based on combining inductively peaking and regulated cascode concepts

in this study an ultra-broad band, low-power, and high-gain cmos distributed amplifier (cmos-da) utilizing a new gain-cell based on the inductively peaking cascaded structure is presented. it is created bycascading of inductively coupled common-source (cs) stage and regulated cascode configuration (rgc).the proposed three-stage da is simulated in 0.13 μm cmos process. it achieves flat and high ...