Design of a fully integrated VHF CP‐PLL frequency synthesizer with an all‐digital defect‐oriented built‐in self‐test

This paper presents the design of an on-chip charge pump phase-locked loop (CP-PLL) with a fully digital defect-oriented built-in self-test (BIST) for very-high frequency (VHF) applications. The synthesizer has 40–100 MHz tuning range and uses ring voltage-controlled oscillator synthesis. PLL exhibits phase noise −132 dBc/Hz at 1 consumes 1.8 mW on 3 V supply. BIST implementation fewer external input or output, is capable efficient fault diagnosis, compact, posing low area overhead. integrated circuit was realized in AMI 0.6μ complementary metal-oxide-semiconductor process.