Design and memory optimization of hybrid gate diffusion input numerical controlled oscillator

The numerically controlled oscillator (NCO) is one of the digital signal generators. It can generate clocked, synchronous, discrete waveform, and generally sinusoidal. Often NCOs care utilized in combinations to analog converter (DAC) at outputs for creating direct synthesizer (DDS). network on chips (NOCs) are various communication systems that fully or mixed signals such as synthesis arbitrary wave, precise control sonar phased array radar, down/up converters, all phase locked loops (PLLs) cellular personal system (PCS) base stations drivers acoustic optical transmissions multilevel shift keying/frequency keying (PSK/FSK) modulators demodulators (modem). basic architecture NCO will be enhanced improved with less hardware facilitating complete level support sorts modulation minimum FPGA resources. In this paper design memory optimization hybrid gate diffusion input (GDI) based field programmable (FPGA) implemented. compared 8-bit microchip, GDI gives effective outcome terms delay, metal-oxide-semiconductor field-effect transistors (MOSFET’s) nodes.