Design a Low Power and High Speed 130nm Fulladder using Exclusive OR and Exclusive NOR Gates

This literature illustrates the high speed and low power Full Adder (FADD) designs. study relates to composited structure of FADD design composed in one unit. In this EXCL-OR/EXCL-NOR designs are used FADD. Mostly concentrates on standard by combining single We implemented two composite structures through full swing And is done pass transistor logic (PTL) same projected design. Such that delay, area design, requirement for circuit gets optimized. The compared reduced constraints requirement, area, delay product (PDP). simulated outcomes verified 130nnm CMOS mentor graphics tool.