Congestion-Aware Routing Algorithm for NoC Using Data Packets

Network on Chip (NoC) is a communication framework for the Multiprocessor System (MPSoC). It router-based system. In NoC architecture, nodes of MPSoC are communicating through network. Different routing algorithms have been developed by researchers, e.g., XY, intermittent DyAD, and DyXY. The main problems in these congestion faults. Congestion faults cause delay, which degrades performance NoC. A congestion-aware algorithm used distribution traffic over avoidance congestion. this paper, proposed. works sending information data packet. implemented 4 × mesh using FPGA. proposed decreases latency, increases throughput, uses less bandwidth sharing between routers comparison to existing algorithms.