Bit Swapping and Cell Ordering on Finding Faults in Test Pattern Generation using BIST
نویسندگان
چکیده
منابع مشابه
Test Pattern Generation Using Pseudorandom Bist
Pseudorandom built-in self test (BIST) generators have been widely utilized to test integrated circuit and systems. In this Project an accumulator-based-3 weight test pattern generation scheme is presented and proposed scheme generates set of test patterns with weights 0, 0.5 and 1. These accumulators are mostly found in current VLSI chips and that the scheme can be efficiently to drive the har...
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ژورنال
عنوان ژورنال: International Journal for Research in Applied Science and Engineering Technology
سال: 2018
ISSN: 2321-9653
DOI: 10.22214/ijraset.2018.5062