Algebraic optimisation of NAND-NOR switching circuits

Universal Gates: NAND and NOR

Two Flash Technologies Compared : NOR vs NAND

Novel Reconfigurable Two-MOSFET UV-programmable Floating-Gate Circuits for CARRY’, NAND, NOR or INVERT functions

This article presents two new, reconfigurable multifunction floating-gate circuit to produce either the INVERTED CARRY function for a FULL-ADDER, an INVERTER, or two-input NAND or NOR gates. The circuits contains two MOSFETs and three or four capacitively coupled input signals. SPICE simulations are shown, demonstrating the principal operation, together with preliminary measurements indicating ...

Long single ZnO nanowire for logic and memory circuits: NOT, NAND, NOR gate, and SRAM.

We demonstrate logic and static random access memory (SRAM) circuits using a 100 μm long and 100 nm thin single ZnO nanowire (NW), which acts as a channel of field-effect transistors (FETs) with Al2O3 dielectrics. NW FETs are thus arrayed in one dimension to consist of NOT, NAND, and NOR gate logic, and SRAM circuits. Two respective top-gate NW FETs with Au and indium-tin-oxide (ITO) were conne...

DNA Simulation of Nand Boolean Circuits ?

In this paper we describe a simulation of Boolean circuits using bio-molecular techniques. Boolean circuits embody the notion of massively parallel signal processing and are frequently encountered in many parallel algorithms. This model operates on the gates and the inputs by standard molecular techniques of sequence-specific annealing, ligation, melting, cleavage, separation and detection by s...