A power-delay-product efficient and SEU-tolerant latch design
نویسندگان
چکیده
منابع مشابه
Low Power Dissipation SEU-hardened CMOS Latch
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ژورنال
عنوان ژورنال: IEICE Electronics Express
سال: 2017
ISSN: 1349-2543
DOI: 10.1587/elex.14.20170972