منابع مشابه
250 MHz Multiphase Delay Locked Loop for Low Power Applications
Received Mar 17, 2017 Revised Sep 8, 2017 Accepted Sep 20, 2017 Delay locked loop is a critical building block of high speed synchronous circuits. An improved architecture of amixed signaldelay locked loop (DLL) is presented here. In this DLL, delay cell based on single ended differential pair configuration is used for voltage controlled delay line (VCDL) implementation. This delay cell provide...
متن کاملA 150-MHz Translinear Phase-Locked Loop
This paper describes the design and implementation of a current-mode phase-locked loop (PLL) using static and dynamic (log-domain) translinear circuits. The loop is fully tuneable, with independent control of center frequency and loop bandwidth. The loop employs a recently proposed current-mode “log-domain” oscillator in a classical PLL topology to obtain these features. The PLL has been fabric...
متن کاملRapid-scan EPR imaging.
In rapid-scan EPR the magnetic field or frequency is repeatedly scanned through the spectrum at rates that are much faster than in conventional continuous wave EPR. The signal is directly-detected with a mixer at the source frequency. Rapid-scan EPR is particularly advantageous when the scan rate through resonance is fast relative to electron spin relaxation rates. In such scans, there may be o...
متن کاملVON HERZEN : SIGNAL PROCESSING AT 250 MHz USING HIGH - PERFORMANCE FPGA
This paper describes an application in high-performance signal processing using reconfigurable computing engines: a 250-MHz cross correlator for radio astronomy. Experimental results indicate that complementary metal–oxide–semiconductor (CMOS) field programmable gate arrays (FPGA’s) can perform useful computation at 250 MHz. The notion of an “event horizon” for FPGA’s leads to clear design cons...
متن کاملA 2 V 0.25µm CMOS 250 MHz fully-differential seventh-order equiripple linear phase LF filter
A fully-differential seventh-order 0.05° equiripple linear phase low-pass filter based on multiple loop feedback (MLF) leapfrog (LF) topology is presented for read/write channels. The filter is designed and simulated with the proposed fully balanced, highly linear operational transconductance amplifier (OTA). This OTA contains two complementary differential cross-coupled input pairs and a pair ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Applied Magnetic Resonance
سال: 2018
ISSN: 0937-9347,1613-7507
DOI: 10.1007/s00723-018-1078-y