this thesis is presented 10 ghz voltage controlled ring oscillator for high speed application. the voltage controlled ring oscillator was designed and fabricated in 0.13یm cmos technology. the oscillator is 7-stages ring oscillator with one inverter replaced by nand-gate for shutting down in the ring oscillator during idle mode. tri-state inverter was used to control of 126 bit vector in ring oscillator. we also used of several techniques such as transistor sizing to improve performance of ring oscillator in pll. in this context, we designed and optimized layout of ring oscillator as small as possible by l-edit software. the predicated performance is verified by analyses and simulation using h-spice and l-edit tools. this ring oscillator is optimized to compare with earlier design. the ring oscillator can operate with 1.8v supply voltage .