‏‎applications such as high definition viedeo reproduction, portable computers, wireless, and multimedia demand, and ever-increasing need for ligh-frequency high-resolution and low-power analog-to-digital converters. flash, two-step flash, and pipeline convertors are fast but consume large amount of power and require large area. to overcome these problems, successive approximation converter blocks can operate in parallel to achieve high speed conversion while require low power and small area. this method relaxes considerably comarator speed. based on this concept, a converter comprised of six successive-approximation converters operating in parallel, was designed. the converter disigned in a double-metal double-poly 1.2-mm cmos process, achieves 50-ms/sec 10-bit conversion. this converter consumes 300-mw power with die area of about 5-mm, total harmonic distortion (thd) of converter is-61db.‎‏