In this work, a novel Silicon on Insulator (SOI) MOSFET is proposed and investigated. The drain and source electrode structures are optimized to enhance ON-current while global device temperature and hot carrier injection are decreased. In addition, to create an effective heat passage from channel to outside of the device, a silicon region has embedded in the buried oxide. In order to reduce th...

SOI means Silicon on Insulator. This type of transistors has Silicon-Insulator-Silicon substrate which is different from conventional MOSFET structure where metal layer is used on the top of Insulator [1, . Now a days, the width of the oxide of a MOSFET is reduced from 300nm to 1.2nm and even less with scaling in technology. If it is further reduced, the leakage problems (majorly Sub-threshold ...

Low-loss rib waveguides on Silicon-on-Insulator are used to demonstrate ultra high-Q and finesse all-pass microring resonators with record finesse of 1100 and Q of 613000. Key words— Microring resonators, Silicon-on-Insulator (SOI)

This paper introduces a novel silicon-on-insulator (SOI) metal–semiconductor field-effect transistor (MESFET) with an implanted N layer (INL-SOI MESFET) to improve the DC and radio frequency characteristics. The DC and radio frequency characteristics of the proposed structure are analyzed by the 2-D ATLAS simulator and compared with a conventional SOI MESFET (C-SOI MESFET). The simulated result...

Smart power ICs, which monolithically integrate low-loss power devices and control circuitry, have attracted much attention in a wide variety of applications [1], [2]. Commonly used smart power devices are the LDMOS and LIGBT implemented in bulk silicon or SOI (Silicon on Insulator). One of the key issues in the realization of such ‘smart power’ technology is the isolation of power devices and ...

An overview is presented of the hybrid AlGaInAs-silicon platform that enables wafer level integration of III-V optoelectronic devices with silicon photonic devices based on silicon-on-insulator (SOI). Wafer bonding AlGaInAs quantum wells to an SOI wafer allows large scale hybrid integration without any critical alignment steps. Discrete hybrid silicon optical amplifiers, lasers and photodetecto...

A metallic coupler is proposed to interface a silicon on insulator (SOI) waveguide with a narrow hybrid plasmonic waveguide (200× 200 nm). The device operation is investigated and optimized to attain the best tradeoff between the mode confinement and the propagation loss. Calculations reveal that a high confinement and low loss of the energy is achieved from a silicon slab waveguide into the di...

This paper describes 0.18um CMOS silicon-on-insulator (SOI) technology and design techniques for SOI RF switch designs for wireless applications. The measured results of SP4T (single pole four throw) and SP8T (single pole eight throw) switch reference designs are presented. It has been demonstrated that SOI RF switch performance, in terms of power handling, linearity, insertion loss and isolati...

−Failure analysis is fundamental to the design and development methodology of electrostatic discharge (ESD) devices and ESD robust circuits. The role of failure analysis (FA) in the models, methodology, band mechanisms evaluation for improving ESD robustness of semiconductor products in CMOS, silicon-on-insulator (SOI) and silicon germanium (SiGe) technologies will be reviewed. Index Terms−Reli...

Silicon-on-insulator (SOI) has been used as a platform for near-infrared photonic devices for more than twenty years. Longer wavelengths, however, may be problematic for SOI due to higher absorption loss in silicon dioxide. In this paper we report propagation loss measurements for the longest wavelength used so far on SOI platform. We show that propagation losses of 0.6-0.7 dB/cm can be achieve...