Sigma-delta modulator based digital-to-analog converters (DAC) have offered low-frequency designers a highly linear, high resolution data converter architecture that is highly amenable to integration with complex digital systems. Increasingly these data converters have been used to deliver all the power needed. In wireless applications, it is increasingly desirable to apply low-frequency sigma-...

This paper presents a reconfigurable digital design of filtering and decimation for a cascade 2-2 sigmadelta ( ) analog-to-digital converter (ADC). The ADC reconfigures its MASH (Multi-Stage-NoiseShaping) topology and building blocks in order to adapt the bandwidth requirements to diverse standard specifications. This reconfigurable design is composed by a logic cancellation of the total first ...

A high resolution analog to digital converter (ADC) is presented and it’s dedicated to neural recording systems. By employing two continuous time incremental sigmadelta(I∑∆) ADC in a pipeline configuration, without sacrificing the conversion rate the proposed ADC can obtain high resolution. This two-step architecture is furthermore power efficient, as the resolution need for the incremental ADC...

This paper proposes a 3rd order single-loop continuous-time incremental sigma-delta analogue-to-digital converter (ADC) for time-multiplexed signals. Incremental sigmadelta modulation is used to address medium to high resolution requirements of multi-channel applications, while a 3rd order continuous-time implementation is investigated as an alternative for low-power solutions. A prototype of t...

Abstract: In this paper, a novel spatial domain 2-D sigma-delta modulation using two-layered discrete-time cellular neural networks (DT-CNNs) with multi-stage noise shaping (MASH) property is proposed. Although the sigmadelta modulation is widely used for realizing of analog to digital converter (ADC), sigma-delta concepts are only for 1-D signals. Signal processing in the digital domain is ext...

Considers the problem of reconstructing a continuous-tone (contone) image from its halftoned version, where the halftoning process is done by error diffusion. The authors present an iterative nonlinear decoding algorithm for halftone-to-contone conversion and show simulation results that compare the performance of the algorithm to that of conventional linear low-pass filtering. They find that t...

This paper presents power optimization of a sigmadelta () modulator based digital-to-analog converter (DAC) for hearing-aid audio back-end application. In a number of state-of-the-art publications the oversampling ratio (OSR) of the  modulator is chosen as a factor of integer power of two. The reason given is the simplicity of the interpolation filter (IF) block. However, being able to choo...

Different decimation filter architectures are compared for integration with an existing second order sigma-delta modulator to form a sigmadelta ADC. The decimation filters are implemented using a third order cascaded integrator comb filter programmed to work for oversampling ratios of 64, 128 and 256. IIR-FIR, non-recursive and polyphase architectures of decimation filters are simulated and imp...

This paper presents a mixed equation-based and simulation-based design methodology for continuous-time Sigma-Delta modulators from high level specifications down to Layout. The calculation and scaling of the SigmaDelta coefficients as well as circuit sizing and layout generation are implemented in the same analog design environment CAIRO+. The design of a complete third order current-mode conti...