نتایج جستجو برای: multi path GRO TDC
تعداد نتایج: 595538 فیلتر نتایج به سال:
چکیده: در ایـن مقاله طراحی یک مبدل زمان به دیجیتال 12 بیتی رزولوشن بالا و توان مصرفی کم مبتنی بر اسیلاتور حلقوی چندمسیره (multi-path gated ring oscillator) در تکنولوژی nm-cmos130 بیان شده است. برای افزایش رزولوشن دو مسیر گیت با رزولوشنهای متفاوت، رزولوشن درشت و رزولوشن ریز، بهصورت ساختار ورنیر استفاده شده است. تأخیر گیت هر مسیر تعیینکننده رزولوشن آن مسیر و به دلیل به کار بردن آنها در ساخت...
چکیده: در ایـن مقاله طراحی یک مبدل زمان به دیجیتال 12 بیتی رزولوشن بالا و توان مصرفی کم مبتنی بر اسیلاتور حلقوی چندمسیره (Multi-Path Gated Ring Oscillator) در تکنولوژی nm-CMOS130 بیان شده است. برای افزایش رزولوشن دو مسیر گیت با رزولوشنهای متفاوت، رزولوشن درشت و رزولوشن ریز، بهصورت ساختار ورنیر استفاده شده است. تأخیر گیت هر مسیر تعیینکننده رزولوشن آن مسیر و به دلیل به کار بردن آنها در ساخت...
An Asynchronous Gated Ring Oscillator based Time to Digital Converter (A-GRO-TDC) is proposed. Gating functionality is added to a simple Ring Oscillator which drastically improves the system performance with asynchronous operation. Energy saving is possible due to scrambling and first order noise shaping. The proposed 9 bit A-GRO-TDC is implemented in Cadence using 0. 18μm digital CMOS Technolo...
An 80MS/s analog-to-digital converter (ADC) based on single-slope conversion is presented which utilizes a recently developed gated ring oscillator (GRO) time-to-digital converter (TDC) to achieve an ENOB of 6.45 bits. To save power, the time-to-digital conversion is done in two steps, the first of which is based on coarse time quantization as measured by cycles of an oscillator and the second ...
This paper presents performance analysis of Gated Ring Oscillator (GRO). Proposed GRO is designed to employ in implementation of Time to Digital Converter (TDC) block of Asynchronous ADC. For an audio frequency range ADC, minimum GRO stages are designed using asynchronous technique. So leads to reduced area and power. Compared to conventional Ring Oscillator (RO), we avoided to employ the gated...
Abstract We present a small-area second-order all-digital time-to-digital converter (TDC) with two frequency shift oscillators (FSOs) comprising inverter chains and dynamic flipflops featuring low jitter. The proposed FSOs can maintain their phase states through continuous oscillation, unlike conventional gated ring oscillators (GROs) that are affected by transistor leakage. Our proposed FSOTDC...
Multiplying delay-locked loops (MDLLs) are gaining popularity due to their superior noise performance over conventional phase-locked loops (PLLs) [1,2]. Recent designs are trending towards an all-digital implementation that provides advantages such as compact area, good scalability and low power compared to traditional analog implementations. Achieving fractional frequency multiplication is, ho...
An easily measured, non-invasive, quantitative estimate of local skin tissue water is useful to assess local lymphedema and its change. One method uses skin tissue dielectric constant (TDC) values that at 300 MHz TDC depend on free and bound water within the measurement volume. In practice such measurements have been done with a research-type multi-probe, but recently a hand-held compact-probe ...
This paper presents an all-digital second-order ΔΣ time-to-digital converter (TDC) by using switched-ring oscillator (SRO) and gated switched-ring oscillator (GSRO). Unlike conventional multi-stage noise-shaping (MASH) TDC using the SRO, the proposed TDC does not require complex calibration to compensate for the error from frequency difference between the SROs. The prototype TDC achieves 148fsr...
A hardware Trojan (HT) detection method is presented that is based on measuring and detecting small systematic changes in path delays introduced by capacitive loading effects or series inserted gates of HTs. The path delays are measured using a high resolution on-chip embedded test structure called a time-to-digital converter (TDC) that provides approx. 25 ps of timing resolution. A calibration...
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