High level ATPG does not make the test problem any easy. In fact, there are several design-flow-related complications it creates. Also, the fault models used in high level ATPG are not suitable. Gate level ATPG has dominated for over 20 years and continue to do so. And there are enough challenging unsolved problems in gate level ATPG and there is no evidence that high level ATPG provides any he...

We present a study of the practical use of a simulationbased automatic test pattern generation (ATPG) for model checking in large sequential circuits. Preliminary findings show that ATPGs which gradually build and learn from the state-space has the potential to achieve the verification objective without needing the complete state-space information. The success of verifying a useful set of prope...

Automatic Test Pattern Generation (ATPG) based on Boolean Satisfiability (SAT) is a robust alternative to classical structural ATPG. Due to the powerful reasoning engines of modern SAT solvers, SAT-based algorithms typically provide a high test coverage because of the ability to reliably classify hardto-detect faults. However, a weak point of SAT-based ATPG is the test compaction ability. In th...

Recursive Learning (RL) is a circuit-structure-based method for computing all necessary assignments. Recursive learning technique can be combined with diierent CAD algorithms and techniques in testing, veriication and optimization. In particular, it is used for Automatic test pattern generation(ATPG) which has been applied to many areas of logic synthesis and formal veriication including combin...

ATPG (Automatic Test-Pattern Generation) is the process of finding an input pattern that will sensitize a specific fault, and then propagate the effect of this fault to a primary output of the device. In this paper, the algorithms of ATPG for combinational circuit are briefly introduced. It includes D-algorithm, Basic ATPG Algorithm, PODEM algorithm and testability measurements, finally the tec...

Automatic Test Pattern Generation (ATPG) is arguably one of the practical applications that motivated the development of modern Boolean Satisfiability (SAT) solvers in the mid 90s. Despite the interest of using SAT in ATPG, the original model remained mostly unchanged for nearly two decades, even in the presence of renewed interest in applying modern SAT technology to large-scale hardware desig...

Advancements in semiconductor technology are making gate-level test generation more challenging. This is because a large amount of detailed structural information must be processed in the search process of automatic test pattern generation (ATPG). In addition, ATPG needs to deal with new defects caused by process variation when IC is shrinking. To reduce the computation effort of ATPG, test gen...

There are many reasons for high level ATPG, but the major one is the need for ATPG to be done at the same level as design. Today a designer has to drop down to gate level to run an ATPG, while verification and most other design activities can be done in RTL. At one time software debugging tools worked at the assembler level, today they work at the level at which people write. Our ATPG tools sho...

It is known that a class of acyclic sequential circuits called balanced circuits can be tested by combinational ATPG. The first contribution of this paper is a modified and efficient combinational single fault ATPG method for any general (not necessarily balanced) acyclic circuit. Without inserting real hardware, we create a “balanced” ATPG model of the circuit in which all reconverging paths h...