As continuous geometric scaling of conventional metal oxide semiconductor field effect transistors(MOSFETs) are facing many fundamental challenges, therefore, new alternatives has to be introduced to provide high performance integrated chips. This paper gives insight on various recent innovations in device engineering for microelectronics and nanoelectronics. The recent developments are mainly ...

In the proposed work an analytical model of a p-channel dual material gate all around tunnel FET (DMGAA-TFET) is presented and its performance is compared with the conventional GAA-TFET. The electrostatic potential profile of the model is obtained using 2-D Laplace’s solution in the cylindrical coordinate system. A quantitative study of the drain current has been carried out using electric fiel...

A hetero gate dielectric low band gap material DG Tunnel FET is presented here. The investigated device is almost free from short channel effects like DIBL and t V rolloff. Simulation of the device characteristics shows significant improvement over conventional double gate TFET when compared interms of on current, ambipolar current, roll-off, miller capacitance and, device delay time. Simulatio...

High speed and low power dissipation devices are expected from future generation technology of Nano-electronic devices. Tunnel field effect transistor (TFET) is unique to the prominent in applications. To minimize leakage currents, tunnel switching TFETs superior conventional MOS FETs. The gate coverage area different fin shape hybrid field-effect transistors more impacted on electric character...

--In today’s technological environment, there is a huge demand for devices with low power and low cost storage space. Memories with low power are driving the entire VLSI industry as most of the devices work on remote power supply. Demand of low power becomes the key of VLSI designs rather than high speed, particularly in embedded SRAM’s and caches. The tunneling field effect transistor uses the...

This work examines the consequence of γ radioactivity on SOI-based Tunnel Field Effect Transistors & their use as radiation dosimeters. Extensive simulations have been carried out throughout study in order to examine creation e--h+ pairs oxide field predict device’s features from region where transistor operation around pinch-off voltage significant agglomeration area. It was found that pre...

In this paper, we analyze the variability of III-V homojunction tunnel FET (TFET) and FinFET devices and 32-bit carry-lookahead adder (CLA) circuit operating in near-threshold region. The impacts of the most severe intrinsic device variations including work function variation (WFV) and fin line-edge roughness (fin LER) on TFET and FinFET device Ion, Ioff, Cg, 32-bit CLA delay and power-delay pr...

To manage the increasing static leakage in low power applications and reduced Ion/Ioff due to aggressive scaling of MOS transistors, Tunnel FET (TFET) devices are considered as the most promising candidates because of their excellent immunity against such important short channel effects. Solutions for leakage reduction as well as improving on current of the device are sought at the device desig...

Tunnel field effect transistor (TFET) technology is unique of the prominent devices in low power applications. The band-to-band tunnel switching mechanism sets TFET apart from traditional MOSFET technology. It helps to reduce leakage currents. major advantage Sub threshold slope smaller than 60mv/decade. Newer technologies are expected change gate, architectures, channel materials and transport...

This paper presents device simulations on the vertical silicon nanowire tunneling FET (VSiNW TFET). Simulations show that a narrow nanowire and thin gate oxide is required for good performance, which is expected even for conventional MOSFETs. The gate length also needs to be more than the nanowire diameter to prevent short channel effects. An effect more unique to TFET is the need for abrupt so...