all practical digital circuits are usually a mixture of combinational and sequential logic. flip–flops are essential to sequential logic therefore fuzzy flip–flops are considered to be among the most essential topics of fuzzy digital circuit. the concept of fuzzy digital circuit is among the most interesting applications of fuzzy sets and logic due to the fact that if there has to be an ultimat...

All practical digital circuits are usually a mixture of combinational and sequential logic. Flip–flops are essential to sequential logic therefore fuzzy flip–flops are considered to be among the most essential topics of fuzzy digital circuit. The concept of fuzzy digital circuit is among the most interesting applications of fuzzy sets and logic due to the fact that if there has to be an ultimat...

   One of the several promising new technologies for computing at nano-scale is quantum-dot cellular automata (QCA). In this paper, new designs for different QCA sequential circuits are presented. Using an efficient QCA D flip-flop (DFF) architecture, a 5-bit counter, a novel single edge generator (SEG) and a divide-by-2 counter are implemented. Also, some types of oscillators, a new edge-t...

We implement a test pattern generation algorithm for synchronous sequential circuits. The sequential test generation algorithm, which is effective for small and medium sized sequential circuits, is based on the PODEM algorithm. In this paper we first implement the standard PODEM algorithm using C++ which is fully tested using combinational circuits. Then we generate test patterns for sequential...

floorplanning is an important step in physical design of vlsi circuits. it is used to plan the positions of a set of circuit modules on a chip in order to optimize the circuit performance. however, modern floorplanning takes better care of providing extra options to place dedicated modules in the hierarchical designs to align circuit blocks one by one within certain bounding box for helping seq...

Several classes of sequential circuits with combinational test generation complexity have been introduced. However, no general notation is used to define the time complexity of test generation. In this paper, we introduce a new test generation notation that we call τ notation in order to present and clarify the classification of sequential circuits based on the combinational test generation com...

We define a formal framework for equivalence checking of sequential quantum circuits. The model we adopt is state machine, which natural generalization Mealy machines. A major difficulty in circuits (but not present classical circuits) that the spaces are continuums. This resolved by our main theorem showing two machines can be done with input sequences taken from some chosen basis (which finit...