This paper presents a six-bit current-steering digital-to-analogue converter (DAC), which optimises the spurious free dynamic range (SFDR) performance of high-speed binary weighted architectures by lowering current switch distortion and reducing the clock feedthrough effect. A novel current source cell is implemented that comprises heterojunction bipolar transistor current switches, negative-ch...

This paper presents a hybrid COordinate Rotation DIgital Computer (CORDIC) algorithm for designs and implementations of the direct digital frequency synthesizer (DDFS). The proposed multiplier-less architecture with small ROM ( 4 16× -bit) and pipelined data path provides a spurious free dynamic range (SFDR) of more than 84.4 dBc. A SoC (System on Chip) has been designed by m . μ 18 0 1P6M CMOS...

These past few years, there have been numerous research efforts concentrated on the spurious free dynamic range (SFDR) enhancement of analog photonic links (APLs). These efforts are driven by various applications, such as military radars [1] and phased-array antennas for radio astronomy [3], that impose stringent SFDR requirements to the APLs. To date, most efforts to increase the SFDR have bee...

This paper deals with maximizing the spurious free dynamic range (SFDR), while minimizing the power consumption of sine-wave approximation circuits used in direct digital frequency synthesizers (DDFSs). A novel 16-segment parabolic approximation is detailed and compared with other recent solutions. The circuit complexity (as number of transistors) is comparable to that of ultra low-power 16-seg...

We proposed a novel structure that improved the linear characteristics of electroabsorption modulator (EAM) with composite quantum-wells as an absorption core layer. We fabricated three types of EAM’s whose active cores were 8 nm thick, 12 nm thick and a composite core with 8 nm thick and 12 nm thick quantum-well (QW), respectively. The transfer functions of EAM’s were investigated and their th...

This paper addresses the problem of improving the spurious free dynamic range (SFDR) for digitization by use of antenna arrays. Nonlinearities in the analog-to-digital conversion process give rise to spurious signals (harmonics and intermodulation products) that limit the overall SFDR of the digitization process. When the signal of interest arises from a sensor such as an antenna or hydrophone,...

Spectrum Analyzers (SAs) are measurement instruments able to decompose a time signal into its frequency components. Due to non-idealities, SAs add noise and distort the signal to be measured. The ratio between the the largest signal and the noise floor level in a measured spectrum, without any distortion components rising above the noise floor, is called the Spurious-Free Dynamic Range (SFDR). ...

110 SEPTEMBER 2004 n Part 1 of this article (in the July 2004 issue of IEEE Signal Processing Magazine), we presented an overview of the basics of direct digital frequency synthesis (DDS), simple formulas to compute bounds of the signal characteristics, and a scheme to improve the DDS spurious free dynamic range (SFDR). In this Part 2, we discuss additional tricks used to optimize DDS performan...

Fiber-optic links are attractive for transmitting microwave/millimeter wave signals for applications such as radar, imaging and astronomy. However, current fiber-optic links that employs intensity modulation and direct detection suffer from limited spurious free dynamic range (SFDR). For solution, a new coherent fiber-optic link using linear phase modulation/demodulation has been proposed. The ...

This paper describes the implementation of a 12-bit 230 MS/s pipelined ADC using a conventional 1.8V, 0.18μm digital CMOS process. Two-stage folded cascode OTA topology is used for improved settling performance. Extreme low-skew (less than 3ps peak-to-peak) chip-level clock distribution is ensured by five-level balanced clock tree, implemented in low swing current-mode logic. The ADC block achi...