Nowadays, the growing demand for supporting multiple applications causes to use multiple IPs onto the chip. In fact, finding truly scalable communication architecture will be a critical concern. To this end, the Networks-on-Chip (NoC) paradigm has emerged as a promising solution to on-chip communication challenges within the silicon-based electronics. Many of today’s NoC architectures are based...

Integrated optical interconnect is believed to be one of the main technologies to replace electrical wires. Optical Network-on-Chip (ONoC) has attracted more attentions nowadays. Benes topology is a good choice for ONoC for its rearrangeable non-blocking character, multistage feature and easy scalability. Routing algorithm plays an important role in determining the performance of ONoC. But trad...

Wireless network on chip (WiNoC) is one of the promising on-chip interconnection networks for on-chip system architectures. In addition to wired links, these architectures also use wireless links. Using these wireless links makes packets reach destination nodes faster and with less power consumption. These wireless links are provided by wireless interfaces in wireless routers. The WiNoC archite...

In this paper the focus is on a family of Interconnection Networks (INs) known as Multistage Interconnection Networks (MINs). When it is exploited in Network-on-Chip (NoC) architecture designs, smaller circuit area, lower power consumption, less junctions and broader bandwidth can be achieved. Each MIN can be considered as an alternative for an NoC architecture design for its simple topology an...

As biological knowledge accumulates rapidly, gene networks encoding genome-wide gene-gene interactions have been constructed. As an improvement over the standard mixture model that tests all the genes iid a priori, Wei and Li (2007) and Wei and Pan (2008) proposed modeling a gene network as a Discrete- or Gaussian-Markov random field (DMRF or GMRF) respectively in a mixture model to analyze gen...

This paper presents design and characterization of NanoCu based ultra-fine pitch chip-to-package interconnects for microwave frequencies. Transitions are designed with this new interconnect and characterized upto 40 GHz in Packaging configurations such as Chip-on-Chip and Chip-onPackage.

The Multiscale Strip Construction, or in short MSC (Lerman et al., 2007), was initially proposed to identify enriched spots in ChIP-on-chip arrays. Here we extend this method to the setting of robust high-dimensional curve estimation. We establish its robustness as well as accurateness by bounding both the empirical influence function and the empirical bias of approximation at a sufficiently la...