A log-domain current-mode true RMS-to-DC converter based on a novel synthesis of a simplified current-mode low pass filter and a two-quadrant squarer/divider is presented. The circuit employs floating gate MOS (FG-MOS) transistors operating in weak inversion region. The converter features low power(

A current-mode squarer/divider circuit with a novel translinear cell is presented for automotive applications. The proposed circuit technique increases the accuracy of the squarer/divider function with better input dynamic range and temperature insensitivity. Simulation results show that the variation of the output current is within ±0.2% over the temperature range from −40◦C to 140◦C. key word...

A new wideband Wilkinson Power Divider which use the nonuniform substrate integrated waveguide (NSIW) method is presented in this paper. This structure utilizes NSIWs instead of the uniform quarter wavelength SIWs in conventional Wilkinson power divider. The proposed structure is analyzed by odd and even mode analysis. The proper NSIW section widths can be extracted by using even mode while the...

Combination of A/D-D/A converters allows implementing multiplier/divider operations. An efficient design based on continuous-time, current-mode, dividing-algorithmic converters is presented in this paper. It offers high speed and capability of low voltage operation, and it is suitable for applications of low or middle resolution (below 9 bits). In addition, the division result is given in both ...

a high accurate and low-voltage analog cmos current divider which operates with a single power supply voltage is designed in 0.18µm cmos standard technology. the proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. the proposed divider is modeled with neural network while tlbo algorithm is used to optimize it. the proposed optimization...

a log-domain current-mode true rms-to-dc converter based on a novel synthesis of a simplified current-mode low pass filter and a two-quadrant squarer/divider is presented. the circuit employs floating gate mos (fg-mos) transistors operating in weak inversion region. the converter features low power(<1.5uw), low supply voltage (0.9v), two quadrant input current, immunity from body effect, low ci...

This project presents two original implementations of improved accuracy current-mode multiplier and divider circuits. Besides the advantage of their simplicity, these original multiplier and divider structures present the advantage of very small linearity errors that can be obtained as a result of the proposed design techniques (0.9% and 0.75%, respectively, for an extended range of the input c...

A CMOS current-mode companding multiplier/divider composed of three compact logarithm circuits and one compact exponential circuit is proposed. Approaches for constructing the logarithm circuits and the exponential circuit are based on second-order Taylor series approximations. By gathering the three logarithm results and passing through the exponential circuit, we can obtain the result of zp(x...

A 0.8-V CMOS Phase-Locked Loop (PLL) has been designed and fabricated by using a 0.13-μm 1p8m CMOS process. In the proposed PLL, the double-positive-feedbacks voltage-controlled oscillator (DPF-VCO) is used to generate current signals for the coupling current-mode injection-locked frequency divider (CCMILFD) and currentinjection current-mode logic (CICML) divider. A short-pulsed-reset phase fre...

Multiplier and divider circuits are usually required in the fields of analog signal processing and parallel-computing neural or fuzzy systems. In particular, this paper focuses on the hardware implementation of fuzzy controllers, where the divider circuit is usually the bottleneck. Multiplier/ divider circuits can be implemented with a combination of A/D-D/A converters. An efficient design base...